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EE 7530 - VLSI Design Synthesis and OptimizationCredit Hour(s): 3 VLSI Synthesis and optimization including data path synthesis, glue logic synthesis control-unit synthesis, and resource sharing. Covers behavioral level to layout level synthesis and corresponding algorithms. Department Managed Prerequisite(s): (Undergraduate level EE 4620 Minimum Grade of D and Undergraduate level EE 4620L Minimum Grade of D) or (Graduate level EE 6620 Minimum Grade of C and Graduate level EE 6620L Minimum Grade of C) Enrollment Restrictions: Must be enrolled in one of the following Levels: Graduate, Medical, Professional. Must be enrolled in one of the following Colleges: College of Egr & Computer Sci. Level: Graduate Schedule Type(s): Lecture
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